1. Technical Field
This disclosure relates to vector processing, and more particularly to the processing of particular vector instructions that perform certain arithmetic and logical operations.
2. Description of the Related Art
In a conventional vector processor that exploits data-level parallelism (DLP), vectorization of loops in program code may affect the widespread adoption of DLP processors. In a typical program, a large portion of execution time is spent in loops. Unfortunately, many of these loops have characteristics that render them unvectorizable in conventional DLP processors. Thus, the performance benefits gained from attempting to vectorize program code can be limited.
One obstacle to vectorizing loops in program code in conventional systems is dependencies between iterations of the loop. For example, loop-carried data dependencies and memory-address aliasing are two such dependencies. These dependencies can be identified by a compiler during the compiler's static analysis of program code, but they cannot be completely resolved until runtime data is available. Thus, because the compiler cannot conclusively determine that runtime dependencies will not be encountered, the compiler cannot vectorize the loop. Hence, because existing systems require that the compiler determine the extent of available parallelism during compilation, relatively little code can be vectorized.